Access FIFO Registers as memory
Some IP's have the requirement to access some registers as normal memory.By default, register space is considered device memory io.
The steps include
DT node
sram1: sram-reserved@80600040000 {
compatible = "mmio-sram";
#address-cells = <2>;
#size-cells = <2>;
reg = <0x806 0x00040000 0x00 0xFFFF>;
};
mydev:mydev@80600050000 {
compatible = "cmd,mydev-tmp";
reg = <0x806 0x00050000 0x00 0x10000>;
adi,sram = <&sram1>;
};Linux probe code snippet
References
Last updated