Access FIFO Registers as memory
Some IP's have the requirement to access some registers as normal memory.By default, register space is considered device memory io.
When there are FIFO registers spanning length over 256bytes , it can be a requirement of the IP to consider this space as memory mapped io.
The steps include
Map the required register space as sram region
access the sram node in the ip node
gen sram_pool in the driver probe
pool alloc for the generated sram_pool
DT node
Linux probe code snippet
References
https://wiki.analog.com/resources/tools-software/linuxdsp/docs/linux-kernel-and-drivers/sram
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